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/*
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             LUFA Library
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     Copyright (C) Dean Camera, 2011.
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  dean [at] fourwalledcubicle [dot] com
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           www.lufa-lib.org
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*/
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/*
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  Copyright 2011  Dean Camera (dean [at] fourwalledcubicle [dot] com)
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  Permission to use, copy, modify, distribute, and sell this
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  software and its documentation for any purpose is hereby granted
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  without fee, provided that the above copyright notice appear in
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  all copies and that both that the copyright notice and this
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  permission notice and warranty disclaimer appear in supporting
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  documentation, and that the name of the author not be used in
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  advertising or publicity pertaining to distribution of the
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  software without specific, written prior permission.
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  The author disclaim all warranties with regard to this
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  software, including all implied warranties of merchantability
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  and fitness.  In no event shall the author be liable for any
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  special, indirect or consequential damages or any damages
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  whatsoever resulting from loss of use, data or profits, whether
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  in an action of contract, negligence or other tortious action,
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  arising out of or in connection with the use or performance of
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  this software.
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*/
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/** \file
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 *  \brief Module Clock Driver for the AVR USB XMEGA microcontrollers.
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 *
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 *  Clock management driver for the AVR USB XMEGA microcontrollers. This driver allows for the configuration
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 *  of the various clocks within the device to clock the various peripherals.
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 */
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/** \ingroup Group_PlatformDrivers
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 *  \defgroup Group_PlatformDrivers_XMEGAClocks AVR USB XMEGA Clock Management Driver - LUFA/Platform/XMEGA/ClockManagement.h
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 *  \brief Module Clock Driver for the AVR USB XMEGA microcontrollers.
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 *
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 *  \section Sec_Dependencies Module Source Dependencies
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 *  The following files must be built with any user project that uses this module:
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 *    - None
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 *
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 *  \section Sec_ModDescription Module Description
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 *  Clock management driver for the AVR USB XMEGA microcontrollers. This driver allows for the configuration
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 *  of the various clocks within the device to clock the various peripherals.
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 *
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 *  Usage Example:
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 *  \code
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 *                #include <LUFA/Platform/XMEGA/ClockManagement.h>
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 *
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 *                void main(void)
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 *                {
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 *                        // Start the internal 32MHz RC oscillator and switch the CPU core to run from it
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 *                        XMEGACLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ);
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 *                        XMEGACLK_SetCPUClockSource(CLOCK_SRC_INT_RC32MHZ, F_CPU);
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 *
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 *                        // Start the external oscillator and multiply up the frequency
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 *                        XMEGACLK_StartExternalOscillator(EXOSC_FREQ_9MHZ_MAX, EXOSC_START_1KCLK);
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 *                        XMEGACLK_StartPLL(CLOCK_SRC_XOSC, 8000000, F_USB);
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 *                }
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 *  \endcode
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 *
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 *  @{
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 */
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#ifndef _XMEGA_CLOCK_MANAGEMENT_H_
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#define _XMEGA_CLOCK_MANAGEMENT_H_
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        /* Includes: */
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                #include <LUFA/Common/Common.h>
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        /* Enable C linkage for C++ Compilers: */
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                #if defined(__cplusplus)
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                        extern "C" {
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                #endif
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        /* Public Interface - May be used in end-application: */
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                /* Macros: */
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                        /** Enum for the possible external oscillator frequency ranges. */
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                        enum XMEGA_Extern_OSC_ClockFrequency_t
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                        {
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                                EXOSC_FREQ_2MHZ_MAX      = OSC_FRQRANGE_04TO2_gc,  /**< External crystal oscillator equal to or slower than 2MHz. */
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                                EXOSC_FREQ_9MHZ_MAX      = OSC_FRQRANGE_2TO9_gc,   /**< External crystal oscillator equal to or slower than 9MHz. */
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                                EXOSC_FREQ_12MHZ_MAX     = OSC_FRQRANGE_9TO12_gc,  /**< External crystal oscillator equal to or slower than 12MHz. */
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                                EXOSC_FREQ_16MHZ_MAX     = OSC_FRQRANGE_12TO16_gc, /**< External crystal oscillator equal to or slower than 16MHz. */        
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                        };
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                        /** Enum for the possible external oscillator statup times. */
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                        enum XMEGA_Extern_OSC_ClockStartup_t
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                        {
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                                EXOSC_START_6CLK         = OSC_XOSCSEL_EXTCLK_gc,      /**< Wait 6 clock cycles before startup (external clock). */
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                                EXOSC_START_32KCLK       = OSC_XOSCSEL_32KHz_gc,       /**< Wait 32K clock cycles before startup (32.768KHz crystal). */
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                                EXOSC_START_256CLK       = OSC_XOSCSEL_XTAL_256CLK_gc, /**< Wait 256 clock cycles before startup. */
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                                EXOSC_START_1KCLK        = OSC_XOSCSEL_XTAL_1KCLK_gc,  /**< Wait 1K clock cycles before startup. */
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                                EXOSC_START_16KCLK       = OSC_XOSCSEL_XTAL_16KCLK_gc, /**< Wait 16K clock cycles before startup. */
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                        };
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                        /** Enum for the possible module clock sources. */
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                        enum XMEGA_System_ClockSource_t
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                        {
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                                CLOCK_SRC_INT_RC2MHZ    = 0, /**< Clock sourced from the Internal 2MHz RC Oscillator clock. */
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                                CLOCK_SRC_INT_RC32MHZ   = 1, /**< Clock sourced from the Internal 32MHz RC Oscillator clock. */
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                                CLOCK_SRC_INT_RC32KHZ   = 2, /**< Clock sourced from the Internal 32KHz RC Oscillator clock. */
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                                CLOCK_SRC_XOSC          = 3, /**< Clock sourced from the External Oscillator clock. */
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                                CLOCK_SRC_PLL           = 4, /**< Clock sourced from the Internal PLL clock. */
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                        };
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                        /** Enum for the possible DFLL clock reference sources. */
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                        enum XMEGA_System_DFLLReference_t
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                        {
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                                DFLL_REF_INT_RC32KHZ   = 0, /**< Reference clock sourced from the Internal 32KHz RC Oscillator clock. */
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                                DFLL_REF_EXT_RC32KHZ   = 1, /**< Reference clock sourced from the External 32KHz RC Oscillator clock connected to TOSC pins. */
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                                DFLL_REF_INT_USBSOF    = 2, /**< Reference clock sourced from the USB Start Of Frame packets. */
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                        };
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                /* Inline Functions: */
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                        /** Starts the external oscillator of the XMEGA microcontroller, with the given options. This routine blocks until
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                         *  the oscillator is ready for use.
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                         *
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                         *  \param[in] FreqRange  Frequency range of the external oscillator, a value from \ref XMEGA_Extern_OSC_ClockFrequency_t.
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                         *  \param[in] Startup    Statup time of the external oscillator, a value from \ref XMEGA_Extern_OSC_ClockStartup_t.
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                         *
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                         *  \return Boolean \c true if the external oscillator was successfully started, \c false if invalid parameters specified.
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                         */
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                        static inline bool XMEGACLK_StartExternalOscillator(const uint8_t FreqRange,
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                                                                            const uint8_t Startup) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_StartExternalOscillator(const uint8_t FreqRange,
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                                                                            const uint8_t Startup)
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                        {
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                                OSC.XOSCCTRL  = (FreqRange | ((Startup == EXOSC_START_32KCLK) ? OSC_X32KLPM_bm : 0) | Startup);
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                                OSC.CTRL     |= OSC_XOSCEN_bm;
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                                while (!(OSC.STATUS & OSC_XOSCRDY_bm));                                
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                                return true;
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                        }
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                        /** Stops the external oscillator of the XMEGA microcontroller. */
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                        static inline void XMEGACLK_StopExternalOscillator(void) ATTR_ALWAYS_INLINE;
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                        static inline void XMEGACLK_StopExternalOscillator(void)
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                        {
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                                OSC.CTRL     &= ~OSC_XOSCEN_bm;
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                        }
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                        /** Starts the given internal oscillator of the XMEGA microcontroller, with the given options. This routine blocks until
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                         *  the oscillator is ready for use.
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                         *
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                         *  \param[in] Source  Internal oscillator to start, a value from \ref XMEGA_System_ClockSource_t.
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                         *
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                         *  \return Boolean \c true if the internal oscillator was successfully started, \c false if invalid parameters specified.
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                         */
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                        static inline uint8_t XMEGACLK_StartInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE;
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                        static inline uint8_t XMEGACLK_StartInternalOscillator(const uint8_t Source)
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                        {
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                OSC.CTRL |= OSC_RC2MEN_bm;
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                                                while (!(OSC.STATUS & OSC_RC2MRDY_bm));
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                                                return true;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                OSC.CTRL |= OSC_RC32MEN_bm;
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                                                while (!(OSC.STATUS & OSC_RC32MRDY_bm));                                        
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                                                return true;
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                                        case CLOCK_SRC_INT_RC32KHZ:
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                                                OSC.CTRL |= OSC_RC32KEN_bm;
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                                                while (!(OSC.STATUS & OSC_RC32KRDY_bm));                                        
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                                                return true;
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                                }
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                                return false;
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                        }
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                        /** Stops the given internal oscillator of the XMEGA microcontroller.
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                         *
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                         *  \param[in] Source  Internal oscillator to stop, a value from \ref XMEGA_System_ClockSource_t.
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                         *
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                         *  \return Boolean \c true if the internal oscillator was successfully stopped, \c false if invalid parameters specified.
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                         */                        
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                        static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source)
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                        {
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                OSC.CTRL &= ~OSC_RC2MEN_bm;
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                                                return true;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                OSC.CTRL &= ~OSC_RC32MEN_bm;
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                                                return true;
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                                        case CLOCK_SRC_INT_RC32KHZ:
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                                                OSC.CTRL &= ~OSC_RC32KEN_bm;
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                                                return true;
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                                }
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                                return false;
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                        }
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                        /** Starts the PLL of the XMEGA microcontroller, with the given options. This routine blocks until the PLL is ready for use.
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                         *
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                         *  \note The output frequency must be equal to or greater than the source frequency.
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                         *
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                         *  \param[in] Source       Clock source for the PLL, a value from \ref XMEGA_System_ClockSource_t.
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                         *  \param[in] SourceFreq   Frequency of the PLL's clock source, in Hz.
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                         *  \param[in] Frequency    Target frequency of the PLL's output.
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                         *
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                         *  \return Boolean \c true if the PLL was successfully started, \c false if invalid parameters specified.
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                         */
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                        static inline bool XMEGACLK_StartPLL(const uint8_t Source,
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                                                             const uint32_t SourceFreq,
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                                                             const uint32_t Frequency) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_StartPLL(const uint8_t Source,
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                                                             const uint32_t SourceFreq,
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                                                             const uint32_t Frequency)
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                        {
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                                uint8_t MulFactor = (Frequency / SourceFreq);
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                                if (SourceFreq > Frequency)
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                                  return false;                                
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                OSC.PLLCTRL = (OSC_PLLSRC_RC2M_gc  | MulFactor);
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                                                break;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                OSC.PLLCTRL = (OSC_PLLSRC_RC32M_gc | MulFactor);
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                                                break;
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                                        case CLOCK_SRC_XOSC:
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                                                OSC.PLLCTRL = (OSC_PLLSRC_XOSC_gc  | MulFactor);
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                                                break;
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                                        default:
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                                                return false;
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                                }
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                                OSC.CTRL |= OSC_PLLEN_bm;
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                                while (!(OSC.STATUS & OSC_PLLRDY_bm));
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                                return true;
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                        }
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                        /** Stops the PLL of the XMEGA microcontroller. */
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                        static inline void XMEGACLK_StopPLL(void) ATTR_ALWAYS_INLINE;
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                        static inline void XMEGACLK_StopPLL(void)
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                        {
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                                OSC.CTRL &= ~OSC_PLLEN_bm;
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                        }
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                        /** Starts the DFLL of the XMEGA microcontroller, with the given options.
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                         *
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                         *  \param[in] Source     RC Clock source for the DFLL, a value from \ref XMEGA_System_ClockSource_t.
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                         *  \param[in] Reference  Reference clock source for the DFLL, an value from \ref XMEGA_System_DFLLReference_t
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                         *  \param[in] Frequency  Target frequency of the DFLL's output.
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                         *
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                         *  \return Boolean \c true if the DFLL was successfully started, \c false if invalid parameters specified.
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                         */
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                        static inline bool XMEGACLK_StartDFLL(const uint8_t Source,
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                                                              const uint8_t Reference,
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                                                              const uint32_t Frequency) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_StartDFLL(const uint8_t Source,
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                                                              const uint8_t Reference,
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                                                              const uint32_t Frequency)
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                        {
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                                uint16_t DFLLCompare = (Frequency / 1024);
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                                uint16_t DFFLCal     = 0;
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                                if (Reference == DFLL_REF_INT_USBSOF)
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                                {
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                                        NVM.CMD = NVM_CMD_READ_CALIB_ROW_gc;
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                                        DFFLCal = ((0x00 << 8) | pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSC)));
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                                }
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                OSC.DFLLCTRL   |= (Reference << OSC_RC32MCREF_gp);
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                                                DFLLRC2M.COMP1  = (DFLLCompare >> 8);
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                                                DFLLRC2M.COMP2  = (DFLLCompare & 0xFF);
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                                                DFLLRC2M.CALA   = (DFFLCal >> 8);
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                                                DFLLRC2M.CALB   = (DFFLCal & 0xFF);
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                                                DFLLRC2M.CTRL   = DFLL_ENABLE_bm;
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                                                break;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                OSC.DFLLCTRL   |= (Reference << OSC_RC32MCREF_gp);
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                                                DFLLRC32M.COMP1 = (DFLLCompare >> 8);
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                                                DFLLRC32M.COMP2 = (DFLLCompare & 0xFF);
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                                                DFLLRC32M.CALA  = (DFFLCal >> 8);
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                                                DFLLRC32M.CALB  = (DFFLCal & 0xFF);
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                                                DFLLRC32M.CTRL  = DFLL_ENABLE_bm;
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                                                break;
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                                        default:
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                                                return false;
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                                }
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                                return true;
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                        }
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                        /** Stops the given DFLL of the XMEGA microcontroller.
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                         *
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                         *  \param[in] Source  RC Clock source for the DFLL to be stopped, a value from \ref XMEGA_System_ClockSource_t.
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                         *
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                         *  \return Boolean \c true if the DFLL was successfully stopped, \c false if invalid parameters specified.
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                         */
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                        static inline bool XMEGACLK_StopDFLL(const uint8_t Source) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_StopDFLL(const uint8_t Source)
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                        {
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                DFLLRC2M.CTRL = 0;
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                                                break;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                DFLLRC32M.CTRL = 0;
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                                                break;
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                                        default:
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                                                return false;
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                                }
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                                return true;
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                        }
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                        /** Sets the clock source for the main microcontroller core. The given clock source should be configured
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                         *  and ready for use before this function is called.
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                         *
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                         *  \param[in] Source      Clock source for the CPU core, a value from \ref XMEGA_System_ClockSource_t.
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                         *  \param[in] SourceFreq  Frequency of the CPU core's clock source, in Hz.
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                         *
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                         *  \return Boolean \c true if the CPU core clock was sucessfully altered, \c false if invalid parameters specified.
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                         */
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                        static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source,
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                                                                      const uint32_t SourceFreq) ATTR_ALWAYS_INLINE;
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                        static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source,
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                                                                      const uint32_t SourceFreq)
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                        {
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                                uint8_t ClockSourceMask = 0;
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                                switch (Source)
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                                {
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                                        case CLOCK_SRC_INT_RC2MHZ:
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                                                ClockSourceMask = CLK_SCLKSEL_RC2M_gc;
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                                                break;
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                                        case CLOCK_SRC_INT_RC32MHZ:
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                                                ClockSourceMask = CLK_SCLKSEL_RC32M_gc;
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                                                break;
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                                        case CLOCK_SRC_INT_RC32KHZ:
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                                                ClockSourceMask = CLK_SCLKSEL_RC32K_gc;
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                                                break;
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                                        case CLOCK_SRC_XOSC:
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                                                ClockSourceMask = CLK_SCLKSEL_XOSC_gc;
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                                                break;
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                                        case CLOCK_SRC_PLL:
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                                                ClockSourceMask = CLK_SCLKSEL_PLL_gc;
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                                                break;
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                                        default:
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                                                return false;
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                                }
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                                uint_reg_t CurrentGlobalInt = GetGlobalInterruptMask();
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                                GlobalInterruptDisable();
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                                CCP      = CCP_IOREG_gc;
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                                CLK.CTRL = ClockSourceMask;
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                                SetGlobalInterruptMask(CurrentGlobalInt);
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                                Delay_MS(1);                                
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                                return (CLK.CTRL == ClockSourceMask);
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                        }
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        /* Disable C linkage for C++ Compilers: */
373
                #if defined(__cplusplus)
374
                        }
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                #endif
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#endif
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/** @} */